Remember the days when verification meant running a simulator with directed tests? (Back then we just called them tests.) Then...
bernard murphy
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It would be nice if there were a pre-packaged set of assertions which could formally check all aspects of cache...
You might have heard of the Multicore and Multiprocessor SoC (MPSoC) Forum sponsored by IEEE and other industry associations and...
Agile methods in hardware design are becoming topical again. What does this mean for verification? Paul Cunningham (GM, Verification at...
Siemens EDA’s Veloce emulation products are long-established and worthy contenders in any emulation smack-down. But there was always a hole...
Cadence calls their hardware acceleration platforms, Palladium Z2 for fast pre-silicon hardware debug and Protium X2 for fast pre-silicon software...
Pratik Mahajan, Synopsys VC Formal R&D Group Director, kicked off an absorbing event featuring talks from multiple customers in Europe....
An unavoidable consequence of getting older is that more frequently our friends and colleagues unexpectedly leave us for their final...
I’ve had a number of enjoyable discussions with John East who ran Actel until it was acquired. (John and Actel...
Paul Cunningham, CVP and GM of the System Verification Group at Cadence gave the afternoon Keynote on Tuesday at DVCon...
