Cadence calls their hardware acceleration platforms, Palladium Z2 for fast pre-silicon hardware debug and Protium X2 for fast pre-silicon software...
bernard murphy
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Pratik Mahajan, Synopsys VC Formal R&D Group Director, kicked off an absorbing event featuring talks from multiple customers in Europe....
An unavoidable consequence of getting older is that more frequently our friends and colleagues unexpectedly leave us for their final...
I’ve had a number of enjoyable discussions with John East who ran Actel until it was acquired. (John and Actel...
Paul Cunningham, CVP and GM of the System Verification Group at Cadence gave the afternoon Keynote on Tuesday at DVCon...
Power integrity analysis in large chip designs is especially challenging thanks to the huge dynamic range the analysis must span....
Is it possible to find and prioritize holes in coverage through AI-based analytics on coverage data? Paul Cunningham (GM, Verification...
Arteris IP and Magillem recently tied the knot, creating a merger of Network-on-Chip (NoC) and related Intellectual Property (IP) with...
.The UVM standard was first released by Accellera 10 years ago this month and is now by far the leading...
